(1) Field of the Invention
This invention relates generally to power management of mobile applications as e.g. mobile phones and relates more particularly to a power management chip having a micro-controller included.
(2) Description of the Prior Art
Electronic mobile devices have increased their functionality dramatically in the past years and this process continues. Adding new functions increases the requirements of the control of the total mobile system and of power management. Examples for these power management requirements are to support multiple charging sources, multiple supply voltages within the product, demands for optimum efficiency, and very limited space complicates power management.
These factors have driven the development of highly integrated power-management chips (PMCs) for cell phones, video cameras, digital still cameras, PDAs, MP3 players, GPS receivers, etc.
Power management chips (PMC) integrate most or all of the functions required for managing battery power, charger control, and voltage conversion in digital cellular handsets and other battery powered mobile applications where power and performance requirements are similar.
Current practice for mobile applications is to have a main micro-controller in the base-band chip set and one or more PMCs, wherein the micro-controller in the base-band is controlling all functions of the mobile system including the power management functions of the PMCs. Within the PMC a small hard-wired state-machine controls the internal functions.
There are patents and patent applications available on the matter of power management of mobile devices.
U.S. Pat. No. (5,182,810 to Bartling et al.) describes a battery-backed ancillary power-management chip, in combination with a battery-backed microprocessor or microcontroller, permits a low-power system to achieve a zero-power standby mode with full nonvolatility. The ancillary chip contains transmission gates, which can cut off the connection between two other chips if one of them is turned off. This avoids problems of power leakage, substrate pumping, etc., when two chips, which are connected together, can be independently powered up or powered down. Also provided is a portable data module, which includes a microprocessor and a large LCD display. The disclosed inventions permit the user to operate the display without powering up the microprocessor (to preserve a complex display, e.g. when the user has provided no inputs for a certain length of time), or to operate the microprocessor without the display (e.g. for data transfer or reduction operations).
U.S. Patent Application (2003/0085622 to Hailey) discloses a method and an apparatus for sharing a load current among a plurality of power supply systems. For each of the plurality of power supply systems an output current and at least one variable representing an operational stress factor associated with the power supply system is measured. The current output of at least one of the plurality of power supplies is adjusted as a function of the at least one measured variable that represents the operational stress factor. The apparatus for sharing a load current among a redundant power supply system includes a first power supply system coupled to a second power supply system. The apparatus also includes a balance circuit configured to receive two inputs. A first input represents a current output of the second power supply system and a second input represents the at least one measured variable associated with the first power supply system. The balance circuit is operable to provide feedback to the first power supply system in response to the received inputs. A computer system includes a power supply, which includes various types of power supplies for converting power from AC-to-DC and/or DC-to-DC. The power supplies may be housed within the computer system enclosure or may be housed external to the computer system enclosure. The computer system also includes a power management chip set. The power management chip set is coupled to a processor via a local bus 620 so that the power management chip set can receive power control commands from processor.
U.S. Patent Application (2004/0039969 to Pratt et al.) describes a method, system and apparatus for testing a removable storage media drive device. According to teachings of the present disclosure, a simulated storage media may be disposed within a removable storage media drive device. In the event removable storage media is not present in the drive device when testing of the device is desired, the simulated storage media may be substituted for at least purposes of testing the operability of one or more device components. In one embodiment, the simulated storage media may be in the form of an annular ring of CD-ROM material. In a further embodiment, the simulated storage media may be in the form of a hologram designed to mimic one or more removable storage media characteristics. An information handling system preferably also includes a power management chip set. The power management chip set is preferably coupled to a CPU via a local bus so that the power management chip set can receive power control commands from the CPU. The power management chip set may also be connected to a plurality of individual power planes.